Abstract: With the development of information technology, the scale of functions of industrial embedded systems has grown rapidly, which has greatly increased the cost of hardware. It is necessary to reduce the cost of hardware to increase profits. At the same time, in order to meet the functional safety constraints of the system, the problem of overall scheduling of tasks and messages also needs to be solved. This paper takes hardware cost reduction as the goal, establishes the hardware reduction cases, defines the timing constraints of task-to-processing unit mapping, between tasks and tasks, and between tasks and messages, and proposes an ILP based hardware cost reduction (IHCR) algorithm. With the premise of ensuring the function response time constraints, the number of processors is reduced as much as possible. Simulation experiments verify the effectiveness of the algorithm in hardware cost savings under the task schedulability.

Key words: heterogeneous embedded system, task scheduling, hardware cost reduction, integer linear programming