Abstract: Direct connection of multi-core processors to build multi-way parallel systems has always been the main way to improve the parallelism of high-performance computers. This paper mainly studies the QoS design and verification of the multi-core processor’s direct connection interface. Through the direct connection interface, the cache consistent message across the chip can be effectively and reliably transmitted, and the SMP system (symmetric multiprocessing) sharing main memory can be realized. In this paper, the key technologies of QoS design for each protocol layer of direct connection interface are described in detail. After the validity of QoS design is verified by the reusable verification platform based on UVM method, it has been transplanted to the FPGA prototype verification platform and passed the test successfully. In order to improve the performance of multi-way servers, it is necessary to further study the direct connection technology of multi-core processors, which has good application and research prospects.

Key words: direct connection interface of multi-core processors, SMP system, QoS design, UVM verification