Abstract: High-Bandwidth Memory (HBM) memory has broad application prospects in big data, intelligent computing and other fields due to its ultra-high storage bandwidth. The silicon interposer that supports ultra-fine-pitch technology is the main carrier to realize the HBM signal interconnection between the memory and the chip. From HBM1.0 to HBM2E, the signal rate reaches 3.2 Gbps, and the signal integrity problem cannot be ignored. Starting from HBM ball map, the signal line distribution, line-width constraint and line-gap constraint are analyzed. A two-layer signal line transmission model is established. The frequency domain impedance analysis method and the total crosstalk calculation method are constructed. The influence of structural parameters on the transmission parameters of electrical properties is analyzed from the frequency domain and verified in the time domain. The result shows that the sum of the HBM signal line width and gap should be less than 6.8 μm. In the application frequency range, the impedance of the signal line at the far silicon layer is 6~8 Ω higher than the impedance of the signal line near the silicon layer, and the impedance value of the 3 μm line width is closer to 50 Ω. Line width and line length are sensitive parameters for insertion loss, and gap and wiring layers have little effect on loss. For the inherent loss in the low frequency area, the line width influence is dominant. For the line loss in the high frequency area, the line length has a greater influence. Line gap is a sensitive factor for crosstalk. However, due to space constraints, spacing optimization is limited. The introduction of ground shielding wire is an effective solution. 

Key words: High-Bandwidth Memory, silicon interposer, signal integrity, impedance, insertion loss, crosstalk, eye diagram