Abstract: Based on the requirement of PLL and clock data recovery circuit in SerDes system, the structure and working principle of feedforward ring oscillator are discussed. On the basis of the traditional structure, the feedforward path is coupled to the source of the main path inverter, which can improve the edge rate of the output signal. Finally, based on the impulse sensitivity function of Hajimiri model, the proposed structure effectively reduces the introduction of thermal noise and flicker noise. Single-source feedforward and dual-source feedforward ring oscillators are designed in 28 nm CMOS process. The simulation results show that when the oscillation frequency is 2.5 GHz, the phase noise of two new structures are -99 dBc/Hz@1 MHz and -105 dBc/Hz@1 MHz respectively, and the FoM are 163 dBc/Hz and 164 dBc/Hz respectively. 

Key words: phase locked loop, ring oscillator, impulse sensitivity function, phase noise