Abstract: High-speed serial interface is a key technology to improve the bandwidth of high-performance interconnection networks, and the channel equalizer is the core component to improve signal integrity. This paper uses the modern digital signal processing (DSP) structure to propose a deep neural network (DNN)-based high-speed channel equalization research method. This method overcomes the inherent shortcoming that the decision speed of the traditional decision feedback equalizer (DFE) is limited by the feedback loop when facing high-speed channels above 50GB in the future. The simulation results show that, compared with the traditional 2-tap DFE architecture with 15-tap FFE, the proposed 3-layer DNN structure has better equalization effect and faster equalization convergence speed, when the PAM4 encoding method is used, the high-speed channel baud rate is 28GB, and the channel loss is 15dB, or the baud rate is 56GB and the channel loss is 30dB.

Key words: deep neural network, high-speed serial link, digital signal processor, equalizer