Abstract: With the continuous growth of processor design scale, cycle-accurate simulation technology is facing challenges.Traditional software simulators are usually slow, while hardware emulation acceleration platforms are often expensive, which limits the use of most academic and industrial research teams. Using FPGA to accelerate cycle-accurate simulation is regarded as a highly promising method. In recent years, FireSim, an open-source platform that uses FPGA for simulation acceleration, not only integrates previous research results in the field of FPGA-accelerated simulation， but also overcomes a series of key obstacles. However, this solution still has the problem of underutilization of FPGA resources, especially the excessive occupation of BRAM resources after model mapping, which limits the further expansion of simulation scale. To solve this problem, new resource management and optimization technologies for FPGA simulation acceleration platforms are proposed, including an automated process for identifying BRAM resource usage and two mapping strategies: migrating components occupying BRAM to URAM to reduce pressure, and achieving balanced resource utilization through distributed reconstruction and resource-sensitive mapping. These technologies increase the simulation scale on a single FPGA from 16 cores to 32 cores, and can theoretically be extended to 64 cores with almost no loss of simulation speed. They effectively enhance the simulation scale expandability of existing platforms and are of great significance for promoting the application of FPGA acceleration technology in large-scale full-system simulation scenarios.

Key words: cycle-accurate simulation, full system simulation, simulator, FPGA-accelerated, FPGA resource optimization