Abstract:

In order to enhance the multimedia data processing abilities, high performance DSPs have generally introduced the SIMD technology. As an important component in DSPs, the multiplier has to support the SIMD function. After an indepth study on the SIMD multiplier's implementation, this work proposes a simple and highly effective 16 bit FTSIMD multiplier, which is composed of two 16×8 bits multipliers, with the help of signedexpansion and splicing operations on the operands and results, the 16bit SIMD multiply is effectively supported. What’s more, our multiplier can be easily expanded to  support the 32bit and 64bit SIMD multiply operations.

Key words: SIMD;multiplier;52 compression;42 compression;Booth coding