• 中国计算机学会会刊
  • 中国科技核心期刊
  • 中文核心期刊

J4 ›› 2012, Vol. 34 ›› Issue (7): 65-70.

• 论文 • Previous Articles     Next Articles

Design and Implementation of an Asynchronous Embedded Processor:TengYueⅡ

SU Bo,SHI Wei,WANG Zhiying,REN Hongguang,WANG Yourui   

  1. (School of Computer Science,National University of Defense Technology,Changsha 410073,China)
  • Received:2010-05-28 Revised:2010-09-06 Online:2012-07-25 Published:2012-07-25

Abstract:

In embedded systems, the power consumption of processors is restricted to a low limit. Asynchronous circuit techniques can be effective methods to design low power processors. In order to meet the performance and power requirements of the multimedia applications in embedded systems, a low power asynchronous microprocessor named “TengYueⅡ”  is designed and implemented. A 32bit onchip bus, two transport triggered architecture cores, two memory controllers and several communication interfaces form the processor. One processor core is based on asynchronous circuits and the other one is its synchronous counterpart. TengYueⅡ processor is implemented in the UMC 0.18μm CMOS technology and the supply voltage is 1.8V. The area of the chip is 4.89mm×4.89mm. The experimental results show that both cores can run correctly at the frequency of 200MHz and the asynchronous core’s power consumption is lower than 50% of the synchronous core.

Key words: low power;transport triggered architecture;asynchronous circuit;embedded multimedia application