Abstract:

A novel and efficient polymorphous array architecture, the Firefly2, is proposed. Its Processing Element (PE) can run in both SIMD and MIMD modes. The PE supports asynchronous interthread communication and efficient parallel execution of distributed instructions. A PE contains a multithread manager to realize onestep context switching and a router for fast data communication. This architecture is highly efficient in realizing parallel computation at thread level, data level, and instruction level. In particular, the performance of this architecture is comparable with ASIC when used for stream processing. This architecture is capable of implementing highperformance, classical static and dynamic dataflow computation. The architecture is designed for computer graphics, image processing and digital signal processing applications.

Key words: array computer;polymorphous processor;computer graphics;image processing;digital signal processing;data level parallelism;thread level parallelism;instruction level parallelism