Abstract:

In the area of scientific computing, digital signal processing, communication and image processing, division is one of the widely used basic operations. Based on SRT-8 algorithm, a SIMD floating-point divider is designed,which is compatible to IEEE-754 standard.The divider supports one double precision floating point division and two parallel single precision floating point division on the same hardware platform.It reduces the iterative division calculation time delay and improves the frequency by optimizing the SRT8 iterative division structure,choosing parallel processing of quotient and residue addition,and adopting rapid storage technique. Besides,it reduces hardware resources and saves area by adopting reuse strategy.Experiments show that the synthesized cell area is 18 601.968 1μm2 and the frequency reaches up to 2.5GHz with 40nm technology library,and the latency of operation is reduced by 23.81％ in comparison to the traditional implementation based on SRT-8.

Key words: SRT-8;SIMD;floating-point division;double precision floating-point;SIMD single precision floating-point