Abstract: HMAC-SHA1 is a widely used user password authentication mechanism, and efficient password recovery for HMAC-SHA1 is of great significance. In terms of password recovery, FPGAs have more advantages than traditional CPU and GPU platforms. Therefore, this paper uses a multi-core FPGA to perform password recovery for HMAC-SHA1. The HMAC-SHA1 password processing algorithm is analyzed, and the core operation SHA1 is implemented and optimized by pipeline, shortening the critical path, and introducing the Carry-Save Adder (CSA). HMAC-SHA1 password processing operator is implemented based on full pipeline and state machine modes. Finally, the password recovery architecture is designed and implemented. The experimental results show that the throughput of SHA1 implemented in this paper is 245.76 Gbps. The password recovery speed on the hardware platform of single board quadruple-core FPGA is 72 times faster than that of CPU and 2.6 times faster than that of GPU.

Key words: password recovery, FPGA, HMAC, high performance computing, information security