Abstract: Sparse matrix vector multiplication (SpMV) is widely used in high performance computing. The parallelization of sparse matrix is more difficult than that of dense matrix because of the sparse and irregular distribution of non-zero elements. Therefore, the performance optimization of sparse matrix vector multiplication has always been the research focus in the field of high performance computing. A parallel SpMV algorithm and performance optimization scheme based on the HYB storage format of sparse matrices is designed for the new generation of domestic heterogeneous many-core processor SW26010P. Moreover, considering the difficulty of threshold selection in HYB storage format, a multi-iteration Otsu method is proposed to determine the threshold of HYB. The experimental results show that our design can achieve an average speedup of 23.36 and the best speedup of 34.85, compared with the sequential method on the Main Processing Element (MPE) of SW26010P.

Key words: Sunway many-core architecture, sparse matrix vector multiplication (SpMV), Otsu method, parallel computing