Abstract: In electronic systems, the problem faced by high-speed circuit design ultimately lies in noise. In the actual high-speed circuit design and production process, there are many factors that can cause problems with signal integrity and power integrity, such as deviations between simulation models and actual PCBs, unreasonable designs, and errors generated during PCB board manufacturing. To address these issues, we conduct research on the analysis and optimization of power switch noise coupling interference on high-speed signals. We first introduce the theory of signal integrity and power integrity, and then conduct theoretical analysis, oscilloscope testing analysis, Cadence simulation analysis, and optimization verification on a case where power switch noise coupling interference affects high-speed signals in a motherboard design process. This paper provides a systematic analysis and solution for similar problems. 

Key words: signal integrity, power switching noise, high-speed signal