Abstract:

The application field of microprocessors is more and more widespread. Meanwhile, the complicated environment makes it face various interferences that   are more and more serious and makes the requirements for its reliability higher and higher. As for the most common fault source of microprocessors,which  is the Single Event Upsets, this paper analyzes the common reliability technique which is called the Triple Module Redundancy （TMR）, and uses a new  redundancy technique named the Space and Time TMR （ST-TMR） to strengthen the system management unit in the microprocessor 8051. Finally, its reliability is tested and analyzed in detail.

Key words: high reliable 8051, microprocessor, space and time TMR, system management unit