[1] |
Swaminathan M, Kim J, Novak I, et al. Power distribution networks for systemonpackage:Status and challenges[J]. IEEE Transactions on Advanced Packaging, 2004,27(2):286300.
|
[2] |
Villur G, Alarcdn E, Guinjoan F, et al. Optimized design of MOS capacitors in standard CMOS technology and evaluation of their equivalent series resistance for power applications[C]∥Proc of International Symposium on Circuits and Systems, 2003:451454.
|
[3] |
Pak J S, Kim J, Cho J, et al. PDN impedance modeling and analysis of a 3D TSV IC by using a proposed P/G TSV array model based on separated P/G TSV and chipPDN models[J]. IEEE Transactions on Advanced Packaging,2011,1(2):208219.
|
[4] |
Nassif S R. Power grid analysis benchmarks[C]∥Proc of the 2008 Asia and South Pacific Design Automation Conference, 2008:376381.
|
[5] |
Khan N H, Alam S M, Hassoun S. Power delivery design for 3D ICs using different throughsilicon via technologies[J]. IEEE Transactions on Very Large Scale Integration System, 2011,19(4):647658.
|
[6] |
Huang G, Bakir M S, Naeemi A, et al. Power delivery for 3D chip stacks:Physical modeling and design implication[C]∥Proc of IEEE Topical Meeting on Electrical Performance of Electronic Packaging, 2007:205208.
|
[7] |
Ingo W.Coplanar microwave integrated circuits[M].New York:Wiley, 2006.
|
[8] |
Kim J, Pak J S, Cho J, et al. Highfrequency scalable electrical model and analysis of a through silicon via[J]. IEEE Transactions on Advanced Packaging, 2011,1(2):181195.
|
[9] |
Cheng D H. Fundamentals of engineering electromagnetics[M]. MA:AddisonWesley, 1992.
|
[10] |
Hall S H.High speed digital system design[M].New York:Wiley, 2000.
|
[11] |
Sadiku M N O. Elements of electromagnetics[M]. 3rd ed. New York:Oxford University Press, 2006.
|
[12] |
Bansal A, Paul B C, Roy K. An analytic fringe capacitance model for interconnects using conformal mapping[J]. IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems, 2006,25(12):27652774.
|
[13] |
Meijs N V D, Fokkema J T. VLSI circuit reconstruction from mask topology[J].Integration, 1984,2(2):85119.
|
[14] |
Eric B. Signal integritysimplified[M]. NJ:PrenticeHall, 2007.
|
[15] |
Kim J,Lee W,Shim Y,et al.Chip package hierarchical power distribution network modeling and analysis based on segmentation method[J]. IEEE Transactions on Advanced Packaging, 2010,33(3):602616.
|