Hybrid Custom Hardware Acceleration for Coarsegrained Dataflow Network Processor

J4 ›› 2011, Vol. 33 ›› Issue (11): 40-47.

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Hybrid Custom Hardware Acceleration for Coarsegrained Dataflow Network Processor

LI Tao,SUN Zhigang

(School of Computer Science,National University of Defense Technology,Changsha 410073,China)

Received:2009-10-01 Revised:2009-11-28 Online:2011-11-25 Published:2011-11-25

Abstract

Abstract:

Aimed at the limitation of ILP exploitation and the fixed topology of controlflow NP, a novel scheme of coarsegrained dataflow NP architectureDynaNP is presented in this paper. DynaNP not only improves the programmability of the NP by the controlflow structure of Processing Elements (PEs), but also effectively exploits the tasklevel parallelism by introducing a dataflow model into the packet processing. Moreover，to further improve the system throughput of DynaNP, a mechanism of hybrid custom hardware acceleration is proposed taking consideration of the multicore and dataflow characteristics of DynaNP. Moreover, some key techniques of implementing the hybrid custom hardware accelerating unit are also addressed. The mechanism provides a unified interface for two kinds of hardware acceleration of custom instructions and coprocessors.

Key words: network processor;dataflow;custom hardware;coprocessor;custom instruction

LI Tao,SUN Zhigang. Hybrid Custom Hardware Acceleration for Coarsegrained Dataflow Network Processor[J]. J4, 2011, 33(11): 40-47.

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Hybrid Custom Hardware Acceleration for Coarsegrained Dataflow Network Processor

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