Abstract:

A parallel vector implementation method for the deblocking filter in H.264 coding algorithm is mapped on the YHFTMatrix DSP. The deblocking filter is analyzed theoretically. The vector data access unit, the vector processing unit, the data shuffle unit and the flexible matrix are fully used to efficiently develop the parallelism of the deblocking filter algorithm. In experiment, the deblocking filter algorithm is mapped on both YHFTMatrix and TI TMS320C6415. And the result shows that YHFTMatrix outperforms TI TMS320C6415.

Key words: H.264 video coding；deblocking filter；parallel design；vectorizable implementation