• 中国计算机学会会刊
  • 中国科技核心期刊
  • 中文核心期刊

J4 ›› 2010, Vol. 32 ›› Issue (7): 69-71.doi: 10.3969/j.issn.1007130X.2010.

• 论文 • 上一篇    下一篇

两种基于FFO的前导零检测算法

黎渊,倪晓强,张民选   

  1. (国防科学技术大学计算机学院,湖南 长沙 410073)
  • 收稿日期:2009-05-11 修回日期:2009-08-26 出版日期:2010-06-25 发布日期:2010-06-25
  • 通讯作者: 黎渊 E-mail:csliyuan@gmail.com
  • 作者简介:黎渊(1984),男,江西宁都人,博士生,研究方向为计算机系统结构和高性能微处理器设计;倪晓强,博士,研究方向为高性能计算机系统及其实现设计;张民选,教授,博士生导师,研究方向为计算机体系结构和高性能微处理器设计。
  • 基金资助:

    教育部高性能微处理器设计创新团队基金资助项目(IRT0614);国家863计划资助项目(2009AA01Z124)

Two Leading Zero Detecting Algorithms Based on  FFO

LI Yuan,NI Xiaoqiang,ZHANG Minxuan   

  1. (School of Computer Science,National University of Defense Technology,Changsha 410073,China)
  • Received:2009-05-11 Revised:2009-08-26 Online:2010-06-25 Published:2010-06-25
  • Contact: LI Yuan E-mail:csliyuan@gmail.com

摘要:

前导0检测(LZD)是浮点加法运算的关键步骤,设计高速的前导0检测算法对提高浮点加法器性能具有重要意义。本文针对64位高性能微处理器浮点运算部件的应用需求,设计并实现了两种基于FFO的前导0检测算法,并对其进行了分析比较。综合结果表明,改进的并行LZD算法具有更高的检测性能,并且通过提前计算出规格化字节移位量,将前导0检测和规格化中的粗粒度移位并行化,进一步减少了整个浮点运算部件的延迟。

关键词: 前导0检测, 浮点加法, FFO逻辑

Abstract:

Leading Zero Detecting (LZD) is a quite critical step during the procedure of floatingpoint addition operation,and thus the design of a highperformance LZD algorithm is of great significance for improving the overall performance of a floatingpoint adder.In order to reach the demands of highperformance floatingpoint addition operations in 64bit CPU’s floatingpoint units,we design and implement two LZD algorithms based on FFO,and compare the  performances of them.According to the results of logic synthesis, a modified parallel LZD algorithm presented in this paper shows higher performance.Furthermore,by precalculating the amount of bytes in normalized shift operations,this algorithm can also parallelize LZD with coarsegrained byteshifting operations,which further reduces the latency in the critical path of the floatingpoint units.

Key words: leading zero detecting;floatingpoint addition;FFO logic