• 中国计算机学会会刊
  • 中国科技核心期刊
  • 中文核心期刊

J4 ›› 2011, Vol. 33 ›› Issue (5): 44-47.

• 论文 • 上一篇    下一篇

基于Galois线性反馈移位寄存器的随机数产生

谷晓忱,张民选   

  1. (并行与分布处理国防科技重点实验室,湖南 长沙 410073)
  • 收稿日期:2010-06-17 修回日期:2010-10-09 出版日期:2011-05-25 发布日期:2011-05-25
  • 作者简介:谷晓忱(1980),男,辽宁丹东人,博士生,研究方向为可重构计算加速、数模混合集成电路设计和射频集成电路设计。张民选(1954),男,教授,博士生导师,研究方向为高性能计算机系统结构、微处理器设计及ASIC技术等。
  • 基金资助:

    国家863计划资助项目(2009AA01Z124,2009AA01Z104,2009AA01Z102)

Random Number Generation Based on the Galois Type LFSR

GU Xiaochen,ZHANG Minxuan   

  1. (National Laboratory for Parallel and Distributed Processing,Changsha 410073,China)
  • Received:2010-06-17 Revised:2010-10-09 Online:2011-05-25 Published:2011-05-25

摘要:

随着FPGA计算能力的不断提高,使用FPGA进行计算加速的研究越来越多。在这些加速对象中,有许多应用都需要使用到随机数生成器。本文应用Leap Forward方法,提出了一种基于Galois类型线性反馈移位寄存器产生随机数的硬件结构。详细分析了该硬件结构中转换矩阵的特征,给出了提高工作速度和减小硬件面积的方法。应用该硬件结构,本文在Xilinx Vertex 6 FPGA上设计实现了16位输出的随机数产生器。实验结果显示,该随机数产生器仅使用了6个slices资源,工作速度可以达到951MHz,产生随机数的吞吐率可以达到15.2Gbps。文中使用KS方法对所产生随机数的质量进行了检测,并给出了所产生的105个随机数的CDF曲线与理论CDF的比对结果。

关键词: 线性反馈移位寄存器, FPGA, 随机数

Abstract:

With the development of FPGA, more and more attention has been paid to FPGA based computing acceleration. And random number generators are frequently used in many of these applications. In this paper, a hardware structure for random number generation based on the Galois type the LFSR and Leap Forward method is proposed. By analyzing the characteristics of the proposed structure, some methods to improve the clock frequency and to save the hardware resources are put forward. A random number generator with 16bit outputs based on the above structure is implemented on the Xilinx Vertex 6 FPGA. This generator occupies only 6 slices, while the frequency and the throughput are as much as 951 MHz and 15.2 Gbps. The KS method is used to test the quality of the generated random numbers, and the CDF curve of the generated 105 random numbers is compared with the theoretical one.

Key words: linear feedback shifted registers;FPGA;random numbers