Abstract:

With the continuous rapid development of integrated circuit technology, the exponential growing of the number of onchip processor cores, the growing complexity of the design, the processor verification faces challenges. However, so far effective tools are still lacked. The paper proposes a multiview coverification method regarding transactionlevel modeling of multicore processors. Using a unified platform, the multiview coverification environment contains simulation verification, formal verification and application verification as three different views. Hence, multicore processors transactionlevel model validation task can be done in this integrated verification environment, owning multiple methods advantages of three different views. Based on a transactionlevel modeling and simulation platform, named SoCLib, we implement a good scalable multiview coverification environment called MVIE. Experimental results show that, compared with traditional single view verification, the proposed multiview coverification method has obvious advantages in transaction verification, especially in terms of convenience, completeness, efficiency, and model data consistency maintenance, etc.

Key words: multi-core processor;transaction level modeling;multi-view;co-verification;SoCLib platform