• 中国计算机学会会刊
  • 中国科技核心期刊
  • 中文核心期刊

J4 ›› 2014, Vol. 36 ›› Issue (05): 828-835.

• 论文 • Previous Articles     Next Articles

Design and implementation of TSV
chain redundancy repair circuit in 3D chip                

YUAN Qiang,ZHAO Zhenyu,DOU Qiang,LI Peng,LIU Haibin   

  1. (College of Computer,National University of Defense Technology,Changsha 410073,China)
  • Received:2013-04-20 Revised:2013-08-01 Online:2014-05-25 Published:2014-05-25

Abstract:

The ThreeDimensional (3D) chip structure is becoming one of the most popular academic research fields in VLSI owing to its advantages such as high integration density, high frequency, lower power, and so on. TSV is the key technology for vertical interconnections in 3D chips. However, TSVs may have some faults during the TSV fabrication or the process of wafer thinning and bonding, which causes that the modules related TSV lose efficacy, even the entire chip doesn’t work normally. A singleredundancy and dualredundancy repair circuit based on TSV chain is proposed. The signals produced by chip testing are used to control repair circuit for the purpose of repairing the TSV defects and transferring the signals of fault TSV to the neighboring good TSV. The experimental results show that the function of this circuit structure is correct and the overall repair ratio can reach more than 91.97%, meanwhile the area overhead is lower.

Key words: 3D chips;TSV chain;redundancy repair circuit;overall repair ratio