• 中国计算机学会会刊
  • 中国科技核心期刊
  • 中文核心期刊

计算机工程与科学 ›› 2021, Vol. 43 ›› Issue (03): 381-388.

• 高性能计算 • 上一篇    下一篇

基于偏折路由的双环片上网络

齐星云,戴艺,赖明澈,常俊胜,董德尊   

  1. (国防科技大学计算机学院,湖南 长沙 410073)

  • 收稿日期:2020-06-10 修回日期:2020-07-11 接受日期:2021-03-25 出版日期:2021-03-25 发布日期:2021-03-26
  • 基金资助:
    国家重点研发计划(2018YFB2202203)

Deflection routing based bi-ring network on chip

QI Xing-yun,DAI Yi,LAI Ming-che,CHANG Jun-sheng,DONG De-zun   

  1. (College of Computer Science and Technology,National University of Defense Technology,Changsha 410073,China)
  • Received:2020-06-10 Revised:2020-07-11 Accepted:2021-03-25 Online:2021-03-25 Published:2021-03-26

摘要: 为了降低中等规模的片上网络设计复杂度,提高网络效率,提出了一种基于偏折路由的双环片上网络结构,研究了其冲突解决机制,给出了一种简单高效的路由算法,并采用硬件描述语言实现了该网络结构,构建了周期精确的网络性能模拟环境。仿真和实验结果表明,在中小规模网络环境以及网络负载不高(<40%)的情况下,这种双环网络结构在延时和吞吐率等性能指标上,与具备100%吞吐率的YARC结构的片上网络相当,但其硬件开销远远小于YARC的。

关键词: 片上网络, 偏折路由, 环形网络, 网络性能, 硬件开销

Abstract: In order to simplify the complexity of network on chip with medium scale and improve the efficiency of the networks, a bi-ring network on chip based on deflection routing is proposed. Its collision resolving mechanism is studied, and a simple and efficient routing algorithm is given. The bi-ring network on chip is implemented by Hardware Description Language (HDL) and its cycle-accurate simulation is constructed. The experimental results show that the bi-ring network has the similar performance with the YARC on-chip network with 100% throughput, but has far less hardware cost.


Key words: network on chip, deflection routing, ring network, network performance, hardware cost